SystemVerilog

Consider it done. Check my past reviews for your reference. Eagerly waiting for your reply so that i can start with the implementation.

I have lots of work experience in digital design using Verilog, VHDL & then verification of ASIC & SoC using HVL like System Verilog, VERA,OVM, UVM, VMM, etc. Have experience building verification enviorment from scrat Más

Hi, i am presently working as Asic verification engineer and expert in system verilog ,UVM & OVM. Thanks & Regards, Kulwant Singh

I'm having 4 years of experience in FPGA validation/verification and having good knowledge about implementation.

A proposal has not yet been provided