Verilog / VHDL Jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Contratar a Verilog / VHDL Designers

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    19 trabajados encontrados, precios en USD

    Development to be performed on Vivado 2019.1 version using Xilinx Zynq 7020 in order to: - Acquire Galileo and GPS signals in real time (FFT and IFTT) - Track Galileo and GPS signals in real time (DLL and PLL) - Demodulation of the Galileo and GPS signals (bit synchronisation and demodulation) Timeline:30 days

    $1362 (Avg Bid)
    $1362 Oferta promedio
    8 ofertas

    I have an encoder and decoder developed in Verilog and need debugging

    $27 / hr (Avg Bid)
    $27 / hr Oferta promedio
    2 ofertas

    I have an encoder and decoder developed in Verilog and need debugging

    $20 / hr (Avg Bid)
    $20 / hr Oferta promedio
    4 ofertas

    I have an encoder and decoder developed in Verilog and need debugging

    $15 - $25 / hr
    $15 - $25 / hr
    0 ofertas

    This project is based on design and implementation of FMCW automotive radar system on Matlab Simulink and calculation of different parameter like speed ,distance and angle and converting signal processing block of radar system into HDL code and verifying the same scenario with same input. Later, optimization of generated HDL code and implementing HDL code into FPGA and verifying it with same inpu...

    $167 (Avg Bid)
    $167 Oferta promedio
    1 ofertas

    I want to know complete VLSI physical design flow in detail

    $32 (Avg Bid)
    $32 Oferta promedio
    2 ofertas

    Design a block diagram for a smart watch using vivado.

    $76 (Avg Bid)
    $76 Oferta promedio
    5 ofertas

    Design a block diagram for a smart watch using vivado.

    $15 (Avg Bid)
    $15 Oferta promedio
    2 ofertas

    I want to control motor with dsPIC33CK and interface with LabVIEW Software.

    $35 (Avg Bid)
    $35 Oferta promedio
    5 ofertas

    I have a circuit, that in which I am using a relay to switch resistance if anyone could explain to me the way another possibility with the circuit, without any microcontroller to switch resistance with low cost and size, I want to switch 1.2ohm resistance to the existing circuit.

    $19 (Avg Bid)
    $19 Oferta promedio
    10 ofertas

    The project is based on designing of automotive radar system using Matlab Simulink block and to perform speed, distance, angle of azimuth and angle of elevation estimation and then performing high level synthesis to generate RTL code of design using Matlab HDL coder tool. Optimization of different parameters like speed and distance using HLS directives of generated HDL code . Implementation and ve...

    $154 (Avg Bid)
    $154 Oferta promedio
    3 ofertas
    $88 Oferta promedio
    18 ofertas

    Computer Science Arithmetic Logic Unit design

    $112 (Avg Bid)
    $112 Oferta promedio
    8 ofertas

    Three 32-bit registers RT, RS, RD, 16-bitIMM16, 32-bit Memory Address Register(MAR), 32-Bit Memory Data Register (MDR), design arithmetic logic unit comprised of ADD/SUB and Bitwise operations.

    $34 (Avg Bid)
    $34 Oferta promedio
    3 ofertas
    $125 Oferta promedio
    7 ofertas

    VS, MIPS, LINUX and GDB for Business purpose

    $11 (Avg Bid)
    $11 Oferta promedio
    3 ofertas
    Operating system lab 1 día left
    VERIFICADO

    This is Arith matic misp lab. I have attached whole pdf. you have to look pdf and follow the instruction. Please see attach pdf. If you understand the lab fully please send me a chat. Every thing is on pdf.

    $7 / hr (Avg Bid)
    $7 / hr Oferta promedio
    6 ofertas

    Need to create a 8052 softcore on a CPLD which will communicate with some Logic ICs, external SRAM Memory. No restrictions on Timing as such.

    $344 (Avg Bid)
    $344 Oferta promedio
    7 ofertas

    implementation on scilab of the projected gradient algorithm and the interior penalty algorithm. Do a to describe how to solve an optimization problem with or without constraints

    $25 (Avg Bid)
    $25 Oferta promedio
    2 ofertas