Cache Simulator in c++

Description In this project, you will be designing a cache simulator. The simulator must be able to handle the following characteristics: Cache Sizes: 1024, 2048, 4096, 8192, 16384 bytes Associativities: Direct Mapped, 2-way, 4-way, 8-way Replacement Policy: LRU, FIFO Block size: 16 bytes. The cache simulator should keep track of misses for each combination of size, associativity, and replacement policy. The input to your program will be a sequence of addresses. For each address, you should simulate a read from the cache. Therefore, given an address you would first check to see if it is contained in the cache. If it isn't, you would increment the number of misses and update the cache using the replacement policies. Assume the size of an address is 32 bits. You are provided with a sample input file (address traces) to help test your program. All numbers in the input file are addresses in decimal format. The simulator should output two tables which contain the miss ratio for each combination of size and associativity. The tables should contain the results for each replacement policy. Output the tables in the following format: 1024 2048 4096 8192 16384 Direct 2-way 4-way 8-way The simulator should be written in C++ under Linux. Make sure that your programs compile and run correctly using the g++ compiler on hill. We will be using this machine to test the programs. Also, your program should work in the following way: executable inputfile In other words, the application should take one command line parameter, which is the name of the input file. The program should then output the tables which are described above. Also, make sure your program does not take a very long time to finish. This can happen if you read in the input file for each different configuration of the cache. You can greatly reduce the running time by testing all cache configurations at the same time, thus avoiding repeated scans of the input file. If your program takes too long to finish, we might mistake it for being in an infinite loop. If you can't get it to work quickly, at least give some kind of output on the screen to let the user know that it isn't frozen. Make sure to turn in a makefile. ## Deliverables Complete and fully-functional working program(s) in executable form as well as complete source code of all work done. In addition to writing the simulator, you are required to write a REPORT summarizing the results for the provided test file. The report should contain an explanation of the miss rates (why they are better for different configurations). If you feel that your results are incorrect, you should explain what the results should be. This will ensure that you will get full credit for the report, even if your results are incorrect. In addition, explain how you implemented the simulator. Include in the report the tables that were output from the simulator. Also, include two graphs in the report. Both graphs should contain miss rate on the y-axis and cache size on the x-axis. Plot four different results on each graph, one for each associativity. The first graph should contain the results for the LRU replacement. The second graph should contain the results for the FIFO replacement. The report should be done in Microsoft Word. Complete copyrights to all work purchased. ## Platform The simulator should be written in C++ under Linux. Make sure it compiles under g++.